As some areas of semiconductor manufacturing technology have developed, the degree of integration in semiconductor devices has increased. With increases in the degree of integration, semiconductor manufacturing process margins have decreased. For example, misalignments of a metal interconnection contact during a manufacturing process may create complications.
FIGS. 1A to 1C are cross-sectional views which illustrate a structure of a semiconductor device. As illustrated in FIG. 1A, gate oxide layer 12 and gate 13 may be formed over silicon substrate 10. Silicon substrate 10 may have an active area defined by isolation layer 11. An ion implantation process may form a low concentration source/drain 14. Sidewall spacer 15 may be formed by depositing a spacer insulation layer and performing an etching process. An ion implantation process may be implemented, which may use sidewall spacer 15 as a mask, to form a high concentration source/drain 16. Silicide metal may be deposited and heat treated to form silicide layer 17 by a self aligning method.
As illustrated in FIG. 1B, etch stop layer 18 maybe deposited. Interlayer dielectric layer 19 may be deposited. As illustrated in FIG. 1C, interlayer dielectric layer 19 may be selectively etched to form contact hole 20. A metal interconnection contact may be formed in contact hole 20 to connect with silicide layer 17 formed over high concentration source/drain 16.
A process of forming a metal interconnection contact in a highly integrated semiconductor device may be susceptible to misalignments. FIG. 2 illustrates an example of a defect that may occur as a result of a misalignment. As illustrated in FIG. 2, contact hole 20 may overlap isolation layer 11 due to a misalignment. Isolation layer 11 may be vulnerable to an etching process employed to etch contact hole 20, which may cause defect 21. Defect 21 may cause junction leakage. Defect 21 may cause an electrical short between a source/drain and a substrate. Defect 21 may degrade characteristics of a semiconductor device. Defect 21 may reduce the yield of semiconductor device manufacturing.